DOCUMENT NO. REV.NO PAGE
STANDARD
NAME
00 11/20
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allowing interfacing with 4-bit or 8-bit MPUs.
！"For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. When to use 4-bit
parallel data transfer, DB0 to DB3 keep “H”or “L”. The data transfer between the VFD module and
the MPU is completed after the 4-bit data has been transferred before the four low order bits (for 8-bit
operation. DB0 to DB3).
The busy flag (BF) are performed before transferring the higher 4 bits. BF checks are not required
before transferring the lower 4 bits.
"
"
"
"
"
Fig 4-biti transfer Example (M68)
！For 8-bit interface data, all eight bus lines (DB0 to DB7) are used.
"
"
5.3 Reset Function
5.3.1 Power-on reset
An internal reset circuit automatically initializes the module when the power is turn on.
The following instructions are executed during the initialization.
1) Display clear
Fill the DD-RAM with 20H (Space Code)
2) Set the address counter to 00H
Set the address counter (ACC) to point DD-RAM.
KT7
KT6
KT2
KT4
KT3
F9
F8
F7
F6
F5
F4
F3
F2
DH
CE8
CE7
CE6
CE5
CE4
CE3
CE2
FT9
FT5
FT8
FT4
FT7
FT3
FT6
FT2
F9
F5
F8
F7
F6
F2
F4
F3
KT5
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RS
R/W
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